A high precision, output-capacitor-free low-dropout regulator for system-on-chip design

An output-capacitor-free multi-stage low-dropout regulator (LDO) with new compensation scheme is presented. This scheme relieves the requirement of compensation capacitor to be 1.2 pF by making use of the large gate capacitance of pass transistor as a large on-chip compensation capacitor. With this compensation scheme, the LDO can employ a multi-stage error amplifier for precise line and load regulation (total line and load error < 0.04%) without sacrificing chip area and its bandwidth. Thus, recovery time of LDO is 1 mus upon a step-load change in between 1 mA and 100 mA. Its output-capacitor-free nature and high area-efficiency make it particularly attractive for system-on-chip (SoC) designs. Proposed LDO is fabricated in a 0.35 mum standard CMOS technology and measurement results confirm with analysis and simulation results.