DocumentCode :
1841167
Title :
ToggleFinder: accurate RTL power estimation for large designs
Author :
Sum, Ming-Yi ; Chang, Kai-Shuang ; Weng, Chia-Chien ; Huang, Shi-Yu
Author_Institution :
Dept. of Electr. Eng., National Tsing-Hua Univ., HsinChu, Taiwan
fYear :
2005
fDate :
27-29 April 2005
Firstpage :
16
Lastpage :
19
Abstract :
Power estimation at the register transfer level (RTL) often suffers from inadequate accuracy when applied to large designs. We address this issue by a multi-mode estimation methodology with two major techniques. Firstly, we use a power mode classification scheme to refine the power-consuming behaviors of a large design. Secondly, we incorporate a functional weighting scheme for easy power characterization. The combination of these two techniques jointly contributes to higher accuracy. The proposed methodology has been realized as a practical tool that can fit into the commercial design flow. Experimental results of an in-house large design with 132K gates and other smaller ones show that the estimation error can be reduced down to only 3% for typical functional patterns.
Keywords :
integrated circuit design; logic design; logic gates; RTL power estimation; ToggleFinder; functional weighting scheme; integrated circuit design; large designs; logic design; logic gates; multi-mode estimation methodology; power characterization; power mode classification scheme; register transfer level; Computational modeling; Energy consumption; Equations; Estimation error; Extrapolation; Logic design; Neural networks; Power generation economics; Predictive models; Statistics;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, Automation and Test, 2005. (VLSI-TSA-DAT). 2005 IEEE VLSI-TSA International Symposium on
Print_ISBN :
0-7803-9060-1
Type :
conf
DOI :
10.1109/VDAT.2005.1500008
Filename :
1500008
Link To Document :
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