Embedded memory diagnostic data compression using differential address

Author

Su, Chin-Lung ; Huang, Rei-Fu ; Wu, Cheng-Wen ; Chang, Yeong-Jar ; Lin, Shen-Tien ; Wu, Wen-Ching

Author_Institution

Dept. of Electr. Eng., National Tsing Hua Univ., Hsinchu, Taiwan

fYear

2005

fDate

27-29 April 2005

Firstpage

20

Lastpage

23

Abstract

Embedded memory diagnostics is normally done by the built-in self-diagnosis (BISD) hardware, which collects and sends the diagnostic data to the external tester. The cost of the diagnosis process highly depends on the data volume sent between the chip under test and the tester, since the transmission time and the tester capture memory are major cost factors. We propose a memory BISD design using differential addressing, as well as a method for evaluating and choosing a proper differential address level. Based on our previous work on pattern identification BISD and syndrome compression design, the proposed differential address compression scheme further reduces the diagnostic data volume. Experimental results show that the BISD design is cost-effective.

Keywords

built-in self test; design for testability; integrated circuit testing; integrated memory circuits; logic testing; built-in self-diagnosis; differential address level; embedded memory diagnostic data compression; integrated circuit testing; logic testing; memory BISD design; pattern identification BISD; syndrome compression design; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Costs; Data compression; Embedded computing; Fault diagnosis; Hardware; Laboratories;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, Automation and Test, 2005. (VLSI-TSA-DAT). 2005 IEEE VLSI-TSA International Symposium on

Print_ISBN

0-7803-9060-1

Type

conf

DOI

10.1109/VDAT.2005.1500009

Filename

1500009