Reconfigurable cryptographic RISC microprocessor

Author

Smyth, Neil ; McLoone, Miire ; McCanny, John V.

Author_Institution

Amphion Semicond. Ltd., Belfast, Ireland

fYear

2005

fDate

27-29 April 2005

Firstpage

Lastpage

Abstract

This paper describes a novel RISC microprocessor that can be utilised to rapidly develop a reprogrammable and high performance embedded security-processing system in SoC designs. Generic and innovative algorithm-specific instructions have been developed for a wide range of private-key and hash algorithms. To the authors´ knowledge, this is the first generic cryptographic microprocessor to be reported in the literature.

Keywords

cryptography; microprocessor chips; reconfigurable architectures; reduced instruction set computing; cryptographic microprocessor; embedded security-processing system; hash algorithm; private-key algorithm; reconfigurable cryptographic RISC microprocessor; reduced instruction set computing; reprogrammable security-processing system; Acceleration; Algorithm design and analysis; Arithmetic; Cryptography; Electronic mail; Galois fields; Microprocessors; NIST; Personal digital assistants; Reduced instruction set computing;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, Automation and Test, 2005. (VLSI-TSA-DAT). 2005 IEEE VLSI-TSA International Symposium on

Print_ISBN

0-7803-9060-1

Type

conf

DOI

10.1109/VDAT.2005.1500012

Filename

1500012

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1841282