DocumentCode
1841292
Title
Test structure for characterization of polycrystalline silicon as a diffusion source for advanced devices
Author
Lojek, B. ; Vasquez, B.
Author_Institution
Motorola Inc., Mesa, AZ, USA
fYear
1990
fDate
5-7 March 1990
Firstpage
105
Lastpage
118
Abstract
Test structures designed for measuring diffusion of impurities in both lateral and vertical directions in deposited films are described. The impact of predeposition cleans on the diffusion of impurities across film-film and film-substrate interfaces can be investigated. Although the structures are designed for studying diffusion in polycrystalline silicon, the basic idea could be applied to other films. A general description of the test structures is given, and results obtained for the lateral diffusion of arsenic in polycrystalline silicon are presented. From these results, the effective lateral diffusion coefficient for arsenic in polycrystalline silicon is determined to be 1.410 exp(-2.63/kT)(cm/sup 2//s).<>
Keywords
arsenic; diffusion in solids; elemental semiconductors; semiconductor doping; silicon; As diffusion; Si:As; characterization; diffusion across interfaces; diffusion source for advanced devices; film-film interfaces; film-substrate interfaces; lateral diffusion coefficient; measuring diffusion of impurities; polycrystalline Si; polycrystalline silicon; polysilicon; predeposition cleans; semiconductors; test structures; vertical diffusion; Appropriate technology; Crystallization; Geometry; Grain boundaries; Impurities; MONOS devices; Semiconductor films; Silicon on insulator technology; Substrates; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Test Structures, 1990. ICMTS 1990. Proceedings of the 1990 International Conference on
Conference_Location
San Diego, CA, USA
Type
conf
DOI
10.1109/ICMTS.1990.67888
Filename
67888
Link To Document