DocumentCode
1841634
Title
A 1.5V, wide-input range, high-bandwidth, CMOS four-quadrant analog multiplier
Author
Sawigun, Chutham ; Mahattanakul, Jirayuth
Author_Institution
Dept. of Electron. Eng., Mahanakorn Univ. of Technol., Bangkok
fYear
2008
fDate
18-21 May 2008
Firstpage
2318
Lastpage
2321
Abstract
A low-voltage low-power CMOS four quadrant analog multiplier based directly on a cross-coupled squarer topology and suitable for the deep submicron technology is presented. Simulation results using 0.35-mum process parameters show that, when operated under a 1.5 V single supply, the proposed multiplier consumes 290 muW of quiescent power, its linear range with respect to both differential input voltages is plusmn0.4 V and its bandwidth is about 100 MHz.
Keywords
CMOS analogue integrated circuits; analogue multipliers; low-power electronics; CMOS four-quadrant analog multiplier; cross-coupled squarer topology; deep submicron technology; power 290 muW; process parameters; size 0.35 mum; voltage 1.5 V; Bandwidth; CMOS technology; Circuit simulation; Circuit topology; Filters; Frequency modulation; MOS devices; MOSFET circuits; Oscillators; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Conference_Location
Seattle, WA
Print_ISBN
978-1-4244-1683-7
Electronic_ISBN
978-1-4244-1684-4
Type
conf
DOI
10.1109/ISCAS.2008.4541918
Filename
4541918
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