DocumentCode
1841782
Title
Asymmetric Doherty power amplifier at 2.2 GHz with 8.2 dB output power back-off
Author
Tarar, Mohsin Mumtaz ; Kalim, Danish ; Negra, Renato
Author_Institution
Mixed-Signal CMOS Circuits, RWTH Aachen Univ., Aachen, Germany
fYear
2012
fDate
12-14 March 2012
Firstpage
1
Lastpage
4
Abstract
This work presents the design and implementation of a 10 W asymmetric Doherty power amplifier (ADPA) with 8.2 dB back-off at 2.2 GHz in Gallium Nitride (GaN) High Electron Mobility Transistors (HEMTs) technology. The amplifier was designed to achieve high efficiency over an increased dynamic range for applications with high peak-to-average power ratios (PAPRs). In order to obtain high efficiency upto 8 dB power back-off (PBO), an even input power divider and two equally sized active devices for the carrier and the peaking PAs operating in class-B and class-C, respectively, were employed. The measured peak output power of the ADPA is 39.9 dBm at the 1 dB compression point (P1dB) with 45.2 % drain efficiency (η) and 39.0 % power added efficiency (PAE). Additionally, η and PAE of 42.0 % and 38.0 % are measured at 8.2 dB PBO from P1dB.
Keywords
III-V semiconductors; high electron mobility transistors; power amplifiers; power dividers; wide band gap semiconductors; ADPA; GaN; PAE; PBO; active device; asymmetric Doherty power amplifier; class B amplifier; class C amplifier; drain efficiency; frequency 2.2 GHz; gain 8.2 dB; gallium nitride HEMT; high electron mobility transistor; peak to average power ratio; power 10 W; power added efficiency; power backoff; power divider; Gain; Gallium nitride; Impedance; Logic gates; Peak to average power ratio; Power generation; Voltage measurement; Asymmetric Doherty PA (ADPA); GaN HEMT; back-off (BO); class-B; class-C; power added efficiency (PAE);
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Conference (GeMiC), 2012 The 7th German
Conference_Location
Ilmenau
Print_ISBN
978-1-4577-2096-3
Electronic_ISBN
978-3-9812668-4-9
Type
conf
Filename
6185160
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