The design of a DSC/DV dual role backend SoC

Author

Lee, Chamg L.

Author_Institution

Sunplus Technol. Co., Ltd., Hsinchu, Taiwan

fYear

2005

fDate

27-29 April 2005

Firstpage

140

Lastpage

143

Abstract

A DSC/DV dual role backend integrated controller chip is presented. It is an integrated SoC that includes hardwired image processing module, JPEG/MPEG-4 SP codec engine, 32-bit RISC engine, and other audio, video, and USB mixed signal interfaces. The key design breakthrough is to merge JPEG and MPEG-4 into a single codec module where DCT and quantization functions are shared between still and video coding process. It can achieve real-time MPEG-4 compression for VGA video at 30fps at only 96MHz speed.

Keywords

data compression; discrete cosine transforms; integrated circuit design; microcontrollers; quantisation (signal); system-on-chip; video codecs; video coding; 32 bits; 96 MHz; DCT; DV; JPEG/MPEG-4 SP codec engine; MPEG-4 compression; RISC engine; SC; VGA video; codec module; hardwired image processing module; integrated SoC; integrated controller chip; mixed signal interfaces; quantization functions; video coding process; Codecs; Engines; Image processing; MPEG 4 Standard; Reduced instruction set computing; Signal processing; Transform coding; Universal Serial Bus; Video compression; Video sharing;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, Automation and Test, 2005. (VLSI-TSA-DAT). 2005 IEEE VLSI-TSA International Symposium on

Print_ISBN

0-7803-9060-1

Type

conf

DOI

10.1109/VDAT.2005.1500039

Filename

1500039