An accurate design of fully integrated 2.4GHz CMOS cascode LNA

Author

Tu, Chih-Ho ; Juang, Ying-Zong ; Chiu, Chin-Fong ; Wang, Ruey-Lue

Author_Institution

Chip Implementation Center, Hsinchu, Taiwan

fYear

2005

fDate

27-29 April 2005

Firstpage

169

Lastpage

172

Abstract

This paper presents a full integrated 2.4GHz inductively degenerated cascode low noise amplifier (LNA) realized in a standard TSMC 0.25-μm CMOS process. The source degenerated inductor has been design after the electromagnetic (EM) analysis using the calibrated substrate conditions. The measured performance of the proposed LNA shows the noise figure (NF) of 2.87 dB, the power gain of 13.29 dB, and the reverse isolation of -30.8 dB. High linearity design with the output 1 dB gain compression point (PldB) of 0 dBm, input third-order intercept point (IIP3) of 2.2 dBm, and the power consumption is only 11 mW while dissipating 5.5 mA from a 2 V supply. The overall measured results of the implemented LNA show good agreement with simulated results.

Keywords

CMOS analogue integrated circuits; UHF amplifiers; UHF integrated circuits; circuit layout; integrated circuit design; network topology; 0.25 micron; 11 mW; 13.29 dB; 1dB gain compression point; 2 V; 2.4 GHz; 2.87 dB; 5.5 mA; CMOS; P1dB; cascode LNA; electromagnetic analysis; low noise amplifier; reverse isolation; source degenerated inductor; standard TSMC; third-order intercept point; CMOS process; Electromagnetic analysis; Electromagnetic induction; Electromagnetic measurements; Gain measurement; Inductors; Low-noise amplifiers; Noise figure; Noise measurement; Power measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, Automation and Test, 2005. (VLSI-TSA-DAT). 2005 IEEE VLSI-TSA International Symposium on

Print_ISBN

0-7803-9060-1

Type

conf

DOI

10.1109/VDAT.2005.1500047

Filename

1500047