Title :
Thermal analysis of a chip scale package technology
Author :
Chambers, Ben ; Lee, Tien-Yu Tom ; Blood, William
Author_Institution :
Adv. Interconnect Syst. Lab., Motorola Inc., Tempe, AZ, USA
Abstract :
This paper investigates the thermal performance of chip scale packages. Their small size limits the amount of heat removal from the package top directly to the air, thus the large majority of the heat must be conducted into the circuit board on which they are mounted. Simulations reveal Θja, is a strong function of package size, with I/O count and die size having lesser influence. The thermal characteristics of the circuit board including the presence of other heat dissipating sources have the greatest influence on package thermal performance within the system level environment
Keywords :
chip scale packaging; heat conduction; thermal management (packaging); chip scale package technology; heat conduction; heat dissipating sources; heat removal; package size; system level environment; thermal performance; Chip scale packaging; Circuit simulation; Costs; Electronic packaging thermal management; Integrated circuit packaging; Integrated circuit technology; Packaging machines; Printed circuits; Semiconductor device packaging; Thermal resistance;
Conference_Titel :
Electronic Components & Technology Conference, 1998. 48th IEEE
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-4526-6
DOI :
10.1109/ECTC.1998.678928
