DocumentCode :
1842219
Title :
A hardware/software-concurrent JPEG2000 encoder
Author :
Yen, Wen-Chi ; Chen, An-Chi ; Liu, Po-Sheng ; Lin, You-Long
Author_Institution :
Dept. of Comput. Sci., National Tsing Hua Univ., Hsinchu, Taiwan
fYear :
2005
fDate :
27-29 April 2005
Firstpage :
181
Lastpage :
184
Abstract :
We implement a JPEG2000 encoder based on a hardware/software co-design methodology. We emphasize on the concurrent execution of hardware accelerator IPs and software running on the CPU. In an SOC platform, sequential hardware acceleration of DWT and EBCOT Tier-1 coding gives us 70% reduction in total execution time. The proposed concurrent scheme achieves additional 14% saving. We describe our experience in bringing up such a system.
Keywords :
data compression; discrete wavelet transforms; hardware-software codesign; image coding; system-on-chip; DWT coding; EBCOT Tier-1 coding; JPEG2000 encoder; SOC platform; hardware accelerator IP; hardware software codesign; Application software; Coprocessors; Data structures; Discrete wavelet transforms; Encoding; Hardware design languages; Protocols; Runtime; Tiles; Virtual colonoscopy;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, Automation and Test, 2005. (VLSI-TSA-DAT). 2005 IEEE VLSI-TSA International Symposium on
Print_ISBN :
0-7803-9060-1
Type :
conf
DOI :
10.1109/VDAT.2005.1500050
Filename :
1500050
Link To Document :
بازگشت