Automatic generation of software/hardware co-emulation interface for transaction-level communication

This paper presents a methodology for generating interface of a co-emulation system where processor and emulator execute testbench and design unit, respectively while interacting with each other. To reduce the communication time between the processor and emulator, data transfers are performed in transaction level instead of signal level. To do this, transactor should be located near the DUT mapped on the hardware emulator. Consequently transactor is described in a synthesizable way. Moreover, the transactor design depends on both emulator system protocol and DUT protocol. Therefore, transactor description would not only be time-consuming but also error-prone task. Based on the layered architecture, we propose an automated procedure for generating co-emulation interface from platform-independent transactor. We have also discussed about the practical issues on multiple channel and clock skew problem.