Title :
Lightweight arithmetic units for VLSI digital signal processors
Author :
Ou, Shih-Hao ; Lin, Tay-Jyi ; Lin, Hung-Yueh ; Chao, Chie-Min ; Liu, Chie-Wei ; Jen, Chein-Wei
Author_Institution :
Dept. of Electron. Eng., National Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
This paper presents a lightweight arithmetic for embedded signal processing, whose hardware complexity is similar to that of the integer one. In our simulations, its 16-bit version has 40.18dB signal to round-off error ratio over the IEEE single-precision floating-point arithmetic, which even out-performs the hand-optimized 32-bit code with integer arithmetic.
Keywords :
IEEE standards; VLSI; circuit optimisation; digital signal processing chips; floating point arithmetic; logic design; 16 bit; 32 bit; 40.18 dB; IEEE single-precision floating-point arithmetic; VLSI digital signal processors; embedded signal processing; hardware complexity; integer arithmetic; lightweight arithmetic units; signal to round-off error ratio; Chaos; Costs; Digital arithmetic; Digital signal processors; Digital systems; Dynamic range; Floating-point arithmetic; Hardware; Programming profession; Very large scale integration;
Conference_Titel :
VLSI Design, Automation and Test, 2005. (VLSI-TSA-DAT). 2005 IEEE VLSI-TSA International Symposium on
Print_ISBN :
0-7803-9060-1
DOI :
10.1109/VDAT.2005.1500089
