DocumentCode :
1843253
Title :
A novel register organization for VLIW digital signal processors
Author :
Tay-Jyi Lin ; Lee, Chen-Chia ; Liu, Chih-Wei ; Jen, Chein-Wei
Author_Institution :
Dept. of Electron. Eng., National Chiao Tung Univ., Taiwan
fYear :
2005
fDate :
27-29 April 2005
Firstpage :
337
Lastpage :
340
Abstract :
This paper presents a novel register organization for VLIW DSPs. The simulation results show the performance of a DSP with the proposed register file is comparable with state-of-the-art DSPs. However, the proposed register file can save 89.7% area of a conventional centralized one, while reducing its access time by 68.6%.
Keywords :
digital signal processing chips; instruction sets; shift registers; VLIW DSP; VLIW digital signal processors; register file; register organization; Delay; Digital signal processing; Digital signal processors; Microprocessors; Power dissipation; Radio frequency; Registers; Silicon; Taxonomy; VLIW;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, Automation and Test, 2005. (VLSI-TSA-DAT). 2005 IEEE VLSI-TSA International Symposium on
Print_ISBN :
0-7803-9060-1
Type :
conf
DOI :
10.1109/VDAT.2005.1500090
Filename :
1500090
Link To Document :
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