A reconfigurable direct RF receiver architecture

This paper describes a bandpass sampling architecture for direct RF conversion that is reconfigurable and efficient. The receiver architecture avoids the requirement for high clock speeds and fast quantizers by using a two-stage sampling process. In the first stage, the RF signal is bandpass filtered and sampled using an impulse-like sampling device without quantizing the signal. After continuous time low-pass or bandpass filtering, the resulting analog signal is then sampled and quantized by a traditional analog-to-digital converter. This architecture also provides a high degree of reconfigurability in tuning range and bandwidth by using a tunable or selectable anti-aliasing filter before the first stage of sampling and by using a tunable sample clock in the first stage of sampling.