DocumentCode :
1844355
Title :
Overlap resolution: arithmetic with continuous valued digits in hybrid architectures
Author :
Saed, Aryán ; Ahmadi, M. ; Jullien, G.A. ; Miller, W.C.
Author_Institution :
VLSI Res. Group, Windsor Univ., Ont., Canada
Volume :
2
fYear :
1997
fDate :
2-5 Nov. 1997
Firstpage :
1188
Abstract :
Overlap resolution signal processing opens up a powerful approach to parallel analog computations with digital accuracy. This new redundant representation of signals, with continuous valued digits, carries the accuracy of analog signal processing beyond the accuracy of the analog circuitry itself. The proposed processing methodology can also be applied to an all digital system. Due to the residue nature of the analog digits, addition is residue-like and resembles carry save structures, yet it is implemented with analog circuitry. Familiar array multiplying structures are applied for multiplication when the multiplicand is overlap resolution and the multiplier is a positional number.
Keywords :
analogue multipliers; parallel architectures; residue number systems; signal representation; signal resolution; ADC; addition; all digital system; analog circuitry; analog digits; analog signal processing; arithmetic; array multiplying structures; carry save structures; continuous valued digits; digital accuracy; multiplicand; multiplication; overlap resolution; parallel analog computations; positional number; redundant signal representation; signal representation; Arithmetic; Array signal processing; Circuits; Computer architecture; Concurrent computing; Costs; Digital signal processing; Signal processing; Signal resolution; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems & Computers, 1997. Conference Record of the Thirty-First Asilomar Conference on
Conference_Location :
Pacific Grove, CA, USA
ISSN :
1058-6393
Print_ISBN :
0-8186-8316-3
Type :
conf
DOI :
10.1109/ACSSC.1997.679092
Filename :
679092
Link To Document :
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