DocumentCode
1844914
Title
Nonlinear analysis of a microwave fractional synthesizer
Author
Sancho, S. ; Chuan, J. ; Suarez, A.
Author_Institution
Dpto de Ingenieria de Comunicaciones, Univ. of Cantabria, Spain
Volume
3
fYear
2002
fDate
2-7 June 2002
Firstpage
2185
Abstract
In this work, the nonlinear analysis of a fractional phase-locked loop with 2.4 GHz output frequency is presented. The nonlinear simulation uses a realistic description for the phase-frequency detector and the loop filter. The phase-error compensation for beat-note spurious reduction is analyzed, predicting the attenuation values for practical and theoretically improved compensation signals. The influence of different loop parameters on the beat note spurious is also studied, through the application of the Poincare map. This technique has also enabled the determination of the phase-locked ranges, delimited by chaotic phenomena. The phase-locked loop has been manufactured and experimentally characterized.
Keywords
UHF circuits; error compensation; frequency synthesizers; microwave circuits; nonlinear network analysis; phase locked loops; 2.4 GHz; Poincare map; attenuation values; beat-note spurious reduction; chaotic phenomena; compensation signals; fractional PLL; fractional phase-locked loop; loop filter; loop parameters; microwave fractional synthesizer; nonlinear analysis; nonlinear simulation; phase-error compensation; phase-frequency detector; phase-locked ranges; Attenuation; Chaos; Filters; Frequency synthesizers; Manufacturing; Phase detection; Phase frequency detector; Phase locked loops; Signal analysis; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Symposium Digest, 2002 IEEE MTT-S International
Conference_Location
Seattle, WA, USA
ISSN
0149-645X
Print_ISBN
0-7803-7239-5
Type
conf
DOI
10.1109/MWSYM.2002.1012305
Filename
1012305
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