DocumentCode :
1845556
Title :
FPGA-based synthesis of FSMs through decomposition
Author :
Yang, W.-L. ; Owen, R.M. ; Irwin, M.J.
Author_Institution :
Dept. of Comput. Sci., Pennsylvania State Univ., University Park, PA, USA
fYear :
1994
fDate :
4-5 Mar 1994
Firstpage :
97
Lastpage :
100
Abstract :
In this paper, we present a heuristic to synthesize a finite state machine as a set of smaller interacting submachines based on FPGA technology. This heuristic partitions inputs as well as outputs. Experimental results show that the sizes of submachines are much smaller than the size of original machine. As a result, the distributed smaller submachines can be operated faster than the original machine because of shorter critical paths
Keywords :
VLSI; finite state machines; logic CAD; logic arrays; minimisation of switching nets; state assignment; FPGA-based synthesis; FSM decomposition; finite state machine; heuristic; interacting submachines; Automata; Broadcasting; Computer science; Costs; Field programmable gate arrays; Integrated circuit interconnections; Minimization; Topology; Very large scale integration; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI, 1994. Design Automation of High Performance VLSI Systems. GLSV '94, Proceedings., Fourth Great Lakes Symposium on
Conference_Location :
Notre Dame, IN
Print_ISBN :
0-8186-5610-7
Type :
conf
DOI :
10.1109/GLSV.1994.289988
Filename :
289988
Link To Document :
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