Title :
A complementary GaAs (CGaAs/sup TM/) 32-bit multiply accumulate unit
Author :
Kelley, Michael J. ; Postiff, Matthew A. ; Strong, Timothy D. ; Brown, Richard B. ; Mudge, Trevor N.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
Abstract :
A high speed one-cycle, 32-bit multiply, 64-bit accumulate unit is presented in complementary GaAs (CGaAs/sup TM/) technology. A tree of 4:2 compressors is used to collect the partial products and a carry select adder is used to determine the final result. Radix-4 Booth encoding is utilized to reduce the partial product tree size. Differential cascode voltage switch logic (DCVSL) is used on critical paths. A description of CGaAs technology, including its inherent radiation hardness, is provided as a background to the discussion. Finally, a study of some of the implications of designing in CGaAs is presented, including logic styles, circuit issues, design methodology, and their effect on performance.
Keywords :
CMOS logic circuits; III-V semiconductors; adders; digital arithmetic; gallium arsenide; multiplying circuits; radiation hardening (electronics); 32 bit; 32-bit multiply accumulate unit; 4:2 compressors; 64 bit; CGaAs technology; CMOS; GaAs; III V semiconductor; carry select adder; complementary GaAs; design method; differential cascode voltage switch logic; high speed one-cycle unit; logic styles; partial product tree size reduction; partial products; performance; radiation hardness; radix-4 Booth encoding; satellite communications; CMOS technology; Gallium arsenide; Implants; Logic devices; Metallization; Microprocessors; Satellite communication; Schottky diodes; Switches; Voltage;
Conference_Titel :
Signals, Systems & Computers, 1997. Conference Record of the Thirty-First Asilomar Conference on
Conference_Location :
Pacific Grove, CA, USA
Print_ISBN :
0-8186-8316-3
DOI :
10.1109/ACSSC.1997.679155
