Title :
Examination of thermal test chip designs using an FEA tool
Author_Institution :
Intel Corp., Chandler, AZ, USA
Abstract :
Thermal test chip is widely used for package thermal characterization. An "ideal" test chip should be designed in such a way that the heating element covers the entire die area and the heat is generated uniformly across the die. Unfortunately, due to the constraint of other testing structures on the same test die or the Si manufacturing processes, a serpentine type of heater is commonly used instead. An FEA tool is used to compare the die temperature profiles between the thermal. test chip with a serpentine beater and an ideal test chip with uniform die heating. The impact of temperature sensor location on. die temperature reading is studied. Correction factors are also provided for each temperature sensor based on the FEA modeling results. It is strongly recommended that all the thermal test chip designs require an examination using FEA tools so that the capability and limitation of the test chip can be fully understood before implementing them in packaging thermal characterization.
Keywords :
finite element analysis; heating elements; temperature distribution; temperature sensors; thermal management (packaging); FEA model; Si; correction factor; die temperature profile; electronic package; heating element; serpentine heater; silicon manufacturing; temperature sensor; thermal characteristics; thermal test chip design; uniform heating; Chip scale packaging; Heat sinks; Heat transfer; Heating; Surface impedance; Temperature measurement; Temperature sensors; Testing; Thermal conductivity; Thermal factors;
Conference_Titel :
Thermal and Thermomechanical Phenomena in Electronic Systems, 2002. ITHERM 2002. The Eighth Intersociety Conference on
Print_ISBN :
0-7803-7152-6
DOI :
10.1109/ITHERM.2002.1012502