Enhanced power analysis attack using chosen message against RSA hardware implementations

Author

Miyamoto, Atsushi ; Homma, Naofumi ; Aoki, Takafumi ; Satoh, Akashi

Author_Institution

Grad. Sch. of Inf. Sci., Tohoku Univ., Sendai

fYear

2008

fDate

18-21 May 2008

Firstpage

3282

Lastpage

3285

Abstract

SPA (simple power analysis) attacks against RSA cryptosystems are enhanced by using chosen-message scenarios. One of the most powerful chosen-message SPA attacks was proposed by Yen et. al. in 2005, which can be applied to various algorithms and architectures, and can defeat the most popular SPA countermeasure using dummy multiplication. Special input values of -1 and a pair of -X and X can be used to identify squaring operations performed depending on key bit stream. However, no experimental result on actual implementation was reported. In this paper, we implemented some RSA processors on an FPGA platform and demonstrated that Yen´s attack with a signal filtering technique clearly reveal the secret key information in the actual power waveforms.

Keywords

cryptography; field programmable gate arrays; filtering theory; FPGA; RSA cryptosystems; chosen-message scenarios; dummy multiplication; hardware implementations; signal filtering; simple power analysis; Electronic mail; Field programmable gate arrays; Hardware; Information analysis; Information filtering; Information filters; Power dissipation; Power measurement; Public key cryptography; Signal processing;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on

Conference_Location

Seattle, WA

Print_ISBN

978-1-4244-1683-7

Electronic_ISBN

978-1-4244-1684-4

Type

conf

DOI

10.1109/ISCAS.2008.4542159

Filename

4542159