Design of BPSK transmitter using FPGA with DAC

In contrast to the sophisticated implementation of binary phase shift keying (BPSK) transmitter using application specific integrated circuit (ASIC), mixer, and local oscillator (LO) for carrier signal; software defined radio (SDR) provides a high performance, efficient, and re-configurable platform to integrate all these individual functions of BPSK transmitter. This paper presents a tutorial exploitation to design and implement BPSK transmitter using field programmable gate array (FPGA) for digital signal processing (DSP), and expansion P240 Analog Module for digital-to-analog (D/A) conversion. For simplicity, the period of carrier sinusoidal signal is designed as one cycle per bit for 5 Mbps input bit. The DSP-based BPSK transmitter is developed and compiled to Verilog HDL (Hardware Description Language) netlist. For proper interfacing D/A converter (DAC) with FPGA, a HDL module of configurations of P240 Analog Module and clock synthesizer is integrated with the HDL netlist of BPSK transmitter. Finally, the optimally synthesized netlist of the integrated design is implemented into Xilinx Virtex-4 FPGA MB development board with DAC. The verification of DAC output signal via oscilloscope shows the empirical real-time result similar to the simulated result. Further up-conversion for the BPSK transmitted signal to higher frequency can be done using external analog RF devices with some design modifications.