DocumentCode :
1848181
Title :
Optimization of active circuits for substrate noise suppression
Author :
Blakiewicz, Grzegorz ; Chrzanowska-Jeske, Malgorzata
Author_Institution :
Dept. of Microelectron. Syst., Gdansk Univ. of Technol., Gdansk
fYear :
2008
fDate :
18-21 May 2008
Firstpage :
3418
Lastpage :
3421
Abstract :
Noise generated by digital sub-circuits becomes a serious problem in fast mixed signal system on chips (SoCs). Digitally generated noise corrupts supply voltages and is propagated inside a silicon substrate as so called substrate noise. The circuits for substrate noise suppression proposed so far have serious weaknesses due to their frequency limitations. We present a method for optimization of noise-suppressive active circuits to improve their properties at high frequencies, illustrate efficiency of the optimization procedure an example of an active circuit consisting of a single voltage gain stage and a buffer is designed and tested by means of simulations. The improved circuits show over 9 dB better substrate noise attenuation at frequencies above 1 GHz in comparison to known passive and active solutions.
Keywords :
active networks; circuit noise; optimisation; system-on-chip; SoC; digital subcircuits; frequency limitations; noise generation; noise-suppressive active circuits; passive-active solutions; single voltage gain stage; substrate noise attenuation; substrate noise suppression; system on chips; Active circuits; Active noise reduction; Circuit noise; Circuit testing; Design optimization; Frequency; Noise generators; Signal generators; System-on-a-chip; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4244-1683-7
Electronic_ISBN :
978-1-4244-1684-4
Type :
conf
DOI :
10.1109/ISCAS.2008.4542193
Filename :
4542193
Link To Document :
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