Title :
Guaranteed passive balancing transformations for model order reduction
Author :
Phillips, Jacob ; Daniel, Luca ; Silveira, L. Miauel
Author_Institution :
Cadence Berkeley Labs., Cadence Design Syst. Inc., San Jose, CA, USA
Abstract :
The major concerns in state-of-the-art model reduction algorithms are: achieving accurate models of sufficiently small size, numerically stable and efficient generation of the models, and preservation of system properties such as passivity. Algorithms such as PRIMA generate guaranteed-passive models, for systems with special internal structure, using numerically stable and efficient Krylov-subspace iterations. Truncated balanced realization (TBR) algorithms, as used to date in the design automation community, can achieve smaller models with better error control, but do not necessarily preserve passivity. In this paper we show how to construct TBR-like methods that guarantee passive reduced models and in addition are applicable to state-space systems with arbitrary internal structure.
Keywords :
circuit simulation; electronic design automation; integrated circuit design; integrated circuit interconnections; iterative methods; large scale integration; passive networks; reduced order systems; state-space methods; Krylov-subspace iterations; PRIMA; arbitrary internal structure; design automation community; error control; guaranteed passive balancing transformations; internal structure; model order reduction; passive reduced models; passivity; state-space systems; system properties; truncated balanced realization algorithms; Acceleration; Algorithm design and analysis; Analytical models; Circuit analysis; Circuit simulation; Design automation; Error correction; Integrated circuit modeling; Permission; Reduced order systems;
Conference_Titel :
Design Automation Conference, 2002. Proceedings. 39th
Print_ISBN :
1-58113-461-4
DOI :
10.1109/DAC.2002.1012593