Title :
Can BDDs compete with SAT solvers on Bounded Model Checking?
Author :
Cabodi, Gianpiero ; Camurati, Paolo ; Quer, Stefano
Author_Institution :
Dip. di Automatica e Informatica, Politecnico di Torino, Turin, Italy
Abstract :
The usefulness of Bounded Model Checking (BMC) based on propositional satisfiability (SAT) methods has recently proven its efficacy for bug hunting. BDD based tools are able to verify broader sets of properties (e.g. CTL formulas) but recent experimental comparisons between SAT and BDDs in formal verification lead to the conclusion that SAT approaches are more robust and scalable than BDD techniques. In this work we extend BDD-based verification to larger circuit and problem sizes, so that it can indeed compete with SAT-based tools. The approach we propose solves Bounded Model Checking problems using BDDs. In order to cope with larger models it exploits approximate traversals, yet it is exact, i.e. it does not produce false negatives or positives. It reaps relevant performance enhancements from mixed forward and backward, approximate and exact traversals, guided search, conjunctive decompositions and generalized cofactor based BDD simplifications. We experimentally compare our tool with BMC in NuSMV (using mchaff as SAT engine), and we show that BDDs are able to accomplish large verification tasks, and they can better cope with increasing sequential depths.
Keywords :
binary decision diagrams; computability; formal verification; logic design; symbol manipulation; BDD; Bounded Model Checking; SAT solver; formal verification; logic design; satisfiability; symbolic manipulation; Algorithm design and analysis; Binary decision diagrams; Boolean functions; Circuits; Data structures; Engines; Formal verification; Logic design; Permission; Robustness;
Conference_Titel :
Design Automation Conference, 2002. Proceedings. 39th
Print_ISBN :
1-58113-461-4
DOI :
10.1109/DAC.2002.1012605