• DocumentCode
    1849772
  • Title

    Modelling AMULET1 in CCS

  • Author

    Birtwistle, G. ; Liu, Y.

  • Author_Institution
    Sch. of Comput. Studies, Leeds Univ., UK
  • fYear
    1996
  • fDate
    35123
  • Firstpage
    42614
  • Lastpage
    42619
  • Abstract
    Describes some of the work completed on the specification and property checking of AMULETI, an industrial strength asynchronous microprocessor. The approaches to formal descriptions of AMULETI in CCS have been sketched at two levels of abstraction: the instruction level (for the whole micro) and at the register transfer level for each floor plan element. The specifications are sufficiently detailed to reproduce (the known) deadlocks in earlier designs and to verify that the final version is deadlock and livelock free and possesses appropriate safety and liveness properties
  • Keywords
    asynchronous circuits; calculus of communicating systems; formal specification; microprocessor chips; pipeline processing; AMULET1; CCS; deadlocks; floor plan element; formal descriptions; industrial strength asynchronous microprocessor; instruction level; liveness properties; property checking; register transfer level; safety properties;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Design and Test of Asynchronous Systems, IEE Colloquium on
  • Conference_Location
    London
  • Type

    conf

  • DOI
    10.1049/ic:19960254
  • Filename
    543168