Title :
Multiprocessor design using joint transform correlator
Author :
Alam, Mohammad S.
Author_Institution :
Dept. of Eng., Purdue Univ., Fort Wayne, IN, USA
Abstract :
The joint transform correlation technique is used to design a binary multiprocessor that can perform full addition and full subtraction in parallel. A new coding scheme is designed for the proposed technique. Finally, simulation results are presented to verify the effectiveness of the proposed scheme
Keywords :
digital arithmetic; digital simulation; encoding; logic design; optical correlation; optical logic; parallel architectures; addition; binary multiprocessor; coding; effectiveness; joint transform correlator; multiprocessor design; optical computing; real-time arithmetic processor; simulation; subtraction; truth table minimisation; Arithmetic; CADCAM; Computer aided manufacturing; Correlators; Fourier transforms; Holography; Matched filters; Optical computing; Optical filters; Optical recording;
Conference_Titel :
Aerospace and Electronics Conference, 1993. NAECON 1993., Proceedings of the IEEE 1993 National
Conference_Location :
Dayton, OH
Print_ISBN :
0-7803-1295-3
DOI :
10.1109/NAECON.1993.290794
