Title :
On output response compression in the presence of unknown output values
Author :
Pomeranz, Irith ; Kundu, Sandip ; Reddy, Sudhakar M.
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Abstract :
A circuit may produce unknown output values during simulation of an input sequence due to an unknown initial state or due to the existence of tri-state elements. For circuits tested using BIST, unknown output values make it impossible to determine a single unique signature for the fault free circuit. To accommodate unknown output values in a BIST scheme, we describe a procedure for synthesizing a minimal logic block that replaces unknown output values by a known constant. The proposed procedure ensures that the BIST scheme will be able to detect all the faults detectable by the input sequence applied to the circuit while allowing a single unique signature to be obtained.
Keywords :
built-in self test; circuit simulation; fault diagnosis; logic simulation; logic testing; BIST; circuit simulation; fault detection; input sequence simulation; known constant; minimal logic block synthesis; output response compression; single unique signature; tri-state elements; unknown output values; Built-in self-test; Circuit faults; Circuit simulation; Circuit synthesis; Circuit testing; Cities and towns; Electrical fault detection; Logic testing; Multiplexing; Permission;
Conference_Titel :
Design Automation Conference, 2002. Proceedings. 39th
Print_ISBN :
1-58113-461-4
DOI :
10.1109/DAC.2002.1012631
