DocumentCode
1850611
Title
Panel: whither (or wither?) ASIC handoff?
Author
Santarini, M. ; Jilla, S.
Author_Institution
EE Times
fYear
2002
fDate
14-14 June 2002
Firstpage
317
Lastpage
318
Keywords
Application specific integrated circuits; Delay effects; Electronic design automation and methodology; Manufacturing industries; Manufacturing processes; Predictive models; Process design; Production systems; Routing; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2002. Proceedings. 39th
Conference_Location
New Orleans, LA, USA
ISSN
0738-100X
Print_ISBN
1-58113-461-4
Type
conf
DOI
10.1109/DAC.2002.1012642
Filename
1012642
Link To Document