Title :
Neural network hardware implementation for emitter identification
Author :
Zahirniak, D. ; Calvin, J. ; Rogers, S.
Author_Institution :
Wright Res. & Dev. Center, Wright-Patterson AFB, OH, USA
Abstract :
This paper presents the results of a neural network hardware implementation for emitter identification. In future electronic warfare environments, pulse densities on the order of hundreds of thousands of pulses per second can be expected in any given mission. To identify hostile radar systems, a processor must be able to store enough signatures for emitters of interest that proper identifications of unknown emitters can be made. Furthermore, the processor must make this identification in “real-time”. This paper presents the results obtained when the Electronically Trainable Neural Network (ETANN) hardware is used to perform emitter identification from time-sampled emitter waveforms. The ETANN is a low (4-6 bit) resolution, high speed (2 billion operations/sec) parallel processor implementing sigmoidal-based backpropagation networks. This hardware was chosen due to minimal interlayer processing times, 3 us per layer, which can allow threat identifications to be made in a matter of microseconds. For this paper, a sigmoidal-based neural network was developed, via simulation on a DEC VAX station, to discriminate between 30 emitters. The network weights were loaded on the ETANN for performance comparisons. Due to resolution constraints, the accuracy of the ETANN was typically 10%-12% lower. However, the ETANN was able to make classifications in less than 6 us. This significant processing speed, with only slight degradations in performance, makes neural network architectures viable alternatives for emitter identification
Keywords :
backpropagation; electronic warfare; military computing; neural nets; pattern recognition equipment; real-time systems; signal detection; 16 bit; 32 bit; DEC VAX station; Electronically Trainable Neural Network; classifications; electronic warfare; emitter identification; hostile radar systems; interlayer processing times; neural network hardware; performance comparisons; real-time; resolution constrain; sigmoidal-based neural network; simulation; time-sampled emitter waveforms; Aerospace electronics; Computational modeling; Computer networks; Computer simulation; Electronic warfare; Neural network hardware; Neural networks; Pattern recognition; Radar; State estimation;
Conference_Titel :
Aerospace and Electronics Conference, 1993. NAECON 1993., Proceedings of the IEEE 1993 National
Conference_Location :
Dayton, OH
Print_ISBN :
0-7803-1295-3
DOI :
10.1109/NAECON.1993.290823