DocumentCode :
1850758
Title :
Evaluation of electronic artificial neural network implementations
Author :
Malhotra, Raj P. ; Siferd, Raymond
Author_Institution :
Dept. of Electr. Eng., Wright State Univ., Dayton, OH, USA
fYear :
1993
fDate :
24-28 May 1993
Firstpage :
885
Abstract :
Artificial Neural Networks (ANNs) have gained recognition as a valuable tool to aid in the solution of difficult computing problems. Despite an abundance of work in the application and mathematical foundations of ANNs there exists no consensus on how to implement ANNs in hardware. The goal of this paper is to provide an analytical perspective on electronic ANN implementation by addressing issues and design tradeoffs. The issues discussed include the question of analog vs. digital implementation, virtual vs. literal realizations, as well as speed and cost considerations in implementing a network
Keywords :
CMOS integrated circuits; VLSI; analogue processing circuits; digital integrated circuits; neural chips; CMOS; analog implementation; asynchronous hybrid IC; connectivity; cost; digital implementation; electronic artificial neural network; speed; virtual implementation; Application software; Artificial neural networks; Computational modeling; Computer architecture; Computer networks; Hardware; Integrated circuit modeling; Neural networks; Parallel processing; Speech recognition;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Aerospace and Electronics Conference, 1993. NAECON 1993., Proceedings of the IEEE 1993 National
Conference_Location :
Dayton, OH
Print_ISBN :
0-7803-1295-3
Type :
conf
DOI :
10.1109/NAECON.1993.290825
Filename :
290825
Link To Document :
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