• DocumentCode
    1851002
  • Title

    Design of asynchronous circuits by synchronous CAD tools

  • Author

    Kondratyev, Alex ; Lwin, Kelvin

  • Author_Institution
    Cadence Berkeley Lab., CA, USA
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    411
  • Lastpage
    414
  • Abstract
    The roadblock to wide acceptance of asynchronous methodology is poor CAD support. Current asynchronous design tools require a significant re-education of designers, and their features are far behind synchronous commercial tools. This paper considers a particular subclass of asynchronous circuits ( convention logic or NCL) and suggests a design flow that is based entirely on commercial CAD tools. This new design flow shows a significant area improvement over known flows based on NCL.
  • Keywords
    VLSI; asynchronous circuits; circuit CAD; integrated circuit design; logic CAD; low-power electronics; NCL; area improvement; asynchronous circuits; convention logic; design flow; re-education; synchronous CAD tools; Asynchronous circuits; Circuit noise; Clocks; Delay; Design automation; Permission; Security; Smart cards; Timing; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2002. Proceedings. 39th
  • ISSN
    0738-100X
  • Print_ISBN
    1-58113-461-4
  • Type

    conf

  • DOI
    10.1109/DAC.2002.1012660
  • Filename
    1012660