Title :
Dynamically reconfigurable NoC for reconfigurable MPSoC
Author :
Ahmad, B. ; Arslan, T.
Author_Institution :
Sch. of Electron. & Eng., Edinburgh Univ.
Abstract :
The performance of a multiprocessor system-on-chip (MPSoC) is not only dependent on the computational capabilities of on-chip processors but also depends on the communication medium connecting them. This has shifted the emphasis from computation to communication architectural design. In this paper, a dynamically reconfigurable network-on-chip (NoC) architecture has been proposed for reconfigurable MPSoC, as a solution to the increased communication needs, keeping low power, quality of service (QoS) and scalability of network in mind
Keywords :
microprocessor chips; multiprocessing systems; network-on-chip; communication architectural design; computation architectural design; computational capability; multiprocessor system-on-chip; network scalability; on-chip processors; quality of service; reconfigurable MPSoC; reconfigurable network on chip; Digital signal processing; Flash memory; Hardware; Multiprocessing systems; Network-on-a-chip; Power system interconnection; Radio frequency; Reduced instruction set computing; System-on-a-chip; Tiles;
Conference_Titel :
Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005
Conference_Location :
San Jose, CA
Print_ISBN :
0-7803-9023-7
DOI :
10.1109/CICC.2005.1626810
