DocumentCode :
1851834
Title :
Panel: formal verification methods: getting around the brick wall
Author :
Dill, D. ; James, N.
Author_Institution :
Stanford University
fYear :
2002
fDate :
14-14 June 2002
Firstpage :
576
Lastpage :
577
Keywords :
Arithmetic; Circuit simulation; Design methodology; Engines; Formal specifications; Formal verification; Humans; Integrated circuit interconnections; Public relations; Vehicle dynamics;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2002. Proceedings. 39th
Conference_Location :
New Orleans, LA, USA
ISSN :
0738-100X
Print_ISBN :
1-58113-461-4
Type :
conf
DOI :
10.1109/DAC.2002.1012691
Filename :
1012691
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=1851834
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