DocumentCode :
1851934
Title :
An improved low voltage phase-frequency detector with extended frequency capability
Author :
Johnson, Tord ; Fard, Ali ; Åberg, Denny
Author_Institution :
Dept. of Electron., Malardalen Univ., Vasteras, Sweden
Volume :
1
fYear :
2004
fDate :
25-28 July 2004
Abstract :
An improved high-performance dynamic-logic tristate phase-frequency detector architecture is derived through extensive time domain analysis. In particular, the impact of the reset time´s on the maximum operating frequency and phase characteristics of the phase-frequency detector is discussed. The analysis is verified for the presented improved architecture and excellent agreement between theory and simulation is observed. The phase-frequency detector architecture is proven to function for supply voltages below 1 V and has an increased frequency capability of more than 20% with a power consumption of 10 μW at 500 MHz input frequency.
Keywords :
CMOS logic circuits; circuit simulation; integrated circuit design; logic design; low-power electronics; phase detectors; power consumption; time-domain analysis; 10 muW; 500 MHz; CMOS logic circuits; circuit simulation; dynamic logic tristate detector; high performance phase frequency detector; integrated circuit design; logic design; low voltage phase frequency detector; power consumption; time domain analysis; Cellular networks; Charge pumps; Low voltage; Phase detection; Phase frequency detector; Phase locked loops; Quadratic programming; Time domain analysis; Voltage-controlled oscillators; Wireless LAN;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2004. MWSCAS '04. The 2004 47th Midwest Symposium on
Print_ISBN :
0-7803-8346-X
Type :
conf
DOI :
10.1109/MWSCAS.2004.1353927
Filename :
1353927
Link To Document :
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