A novel synthesis technique for communication controller hardware from declarative data communication protocol specifications

An innovative methodology for the efficient design of communication controller hardware for popular protocols such as ATM, USB or CAN is proposed. In our approach, controller hardware in the form of RTL models is synthesized from a formal specification of a communication protocol. The difference to previously published work related to hardware synthesis techniques from protocol specifications is that in our approach a complete communication architecture consisting of both the interacting transaction producer and the consumer controllers, as well as the interconnect between them, are synthesized from one single protocol specification in the same synthesis tool run, thus ensuring conformity of all producer and consumer controllers to the protocol specification while tremendously reducing the modeling effort for the controller specifications. The formalism used for protocol specification and a corresponding hardware synthesis algorithm from such specifications are presented. The methodology has been applied to the design of various communication controllers including IEC14443 Wireless SmartCard, ATM and CAN. The novelty and efficiency of our methodology is demonstrated through comparison to state-of-the-art protocol synthesis tools.