Title :
A 1991 Mpixels/s intra prediction architecture for Super Hi-Vision H.264/AVC encoder
Author :
He, Gang ; Zhou, Dajiang ; Zhou, Jinjia ; Goto, Satoshi
Author_Institution :
Grad. Sch. of Inf. Production & Syst., Waseda Univ., Kitakyushu, Japan
Abstract :
This paper presents an H.264/AVC intra prediction design for Super Hi-Vision (SHV) video. Due to huge throughput requirements, design challenges such as data dependency and complexity become even more critical. To solve these problems, we first propose an interlaced block reordering scheme together with a coarse-to-fine mode decision (CFMD) strategy to resolve the data dependency between intra mode decision and reconstruction. Circuits area is reduced in the meantime with CFMD. We also propose a probability-based reconstruction scheme to solve the problem from long pipeline latency. As a result, hardware complexity in terms of the product of area and frequency is reduced by 74%. The maximum throughput reaches 1991Mpixels/s for 7680×4320p 60fps video. Total logic gate count is 451.5k in 65nm library.
Keywords :
image reconstruction; logic gates; probability; video coding; 1991 Mpixels-s intraprediction architecture; CFMD strategy; SHV video; coarse-to-fine mode decision strategy; data complexity; data dependency; interlaced block reordering scheme; intramode decision; intramode reconstruction; logic gate; pipeline latency; probability-based reconstruction scheme; size 65 nm; super hi-vision H.264/AVC encoder; Complexity theory; Encoding; Engines; Hardware; Pipelines; Throughput; Video coding; H.264/AVC; SHV; hardware architecture; intra prediction;
Conference_Titel :
Signal Processing Conference (EUSIPCO), 2012 Proceedings of the 20th European
Conference_Location :
Bucharest
Print_ISBN :
978-1-4673-1068-0