DocumentCode :
1852143
Title :
Compiler-directed scratch pad memory hierarchy design and management
Author :
Kandemir, M. ; Choudhary, A.
Author_Institution :
Microsystems Design Lab., Pennsylvania State Univ., University Park, PA, USA
fYear :
2002
fDate :
2002
Firstpage :
628
Lastpage :
633
Abstract :
One of the primary challenges in embedded system design is designing the memory hierarchy and restructuring the application to take advantage of it. This task is particularly important for embedded image and video processing applications that make heavy use of large multidimensional arrays of signals and nested loops. In this paper, we show that a simple reuse vector/matrix abstraction can provide compiler with useful information in a concise form. Using this information, compiler can either adapt application to an existing memory hierarchy or can come up with a memory hierarchy. Our initial results indicate that the compiler is very successful in both optimizing code for a given memory hierarchy and designing a hierarchy with reasonable performance/size ratio.
Keywords :
embedded systems; optimising compilers; storage management; code optimization; compiler-directed scratch pad memory hierarchy design; compiler-directed scratch pad memory hierarchy management; embedded image processing; embedded system design; embedded video processing; large multidimensional signal arrays; nested loops; performance/size ratio; reuse vector/matrix abstraction; Application software; Atherosclerosis; Design optimization; Embedded system; Memory architecture; Memory management; Optimizing compilers; Scanning probe microscopy; Signal design; Signal processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2002. Proceedings. 39th
ISSN :
0738-100X
Print_ISBN :
1-58113-461-4
Type :
conf
DOI :
10.1109/DAC.2002.1012701
Filename :
1012701
Link To Document :
بازگشت