DocumentCode
1852720
Title
SAT with partial clauses and back-leaps
Author
Pilarski, Slawomir ; Hu, Gracia
Author_Institution
Synopsys Inc., Hillsboro, OR, USA
fYear
2002
fDate
2002
Firstpage
743
Lastpage
746
Abstract
This paper presents four new powerful SAT optimization techniques: partial clauses, back-leaps, immediate implications, and local decisions. These optimization techniques can be combined with SAT mechanisms used in Chaff, SATO, and GRASP to develop a new solver that significantly outperforms its predecessors on a large set of benchmarks. Performance improvements for standard benchmark groups vary from 1.5x to 60x. Performance improvements measured using VLIW microprocessor benchmarks amount to 3.31 x.
Keywords
Boolean functions; circuit optimisation; electronic design automation; logic CAD; microprocessor chips; Chaff; GRASP; SAT; SATO; VLIW microprocessor; back-leaps; benchmarks; immediate implications; local decisions; optimization techniques; partial clauses; Automatic test pattern generation; Business continuity; Design automation; Design engineering; Electronic design automation and methodology; Formal verification; Logic; Microprocessors; Permission; VLIW;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2002. Proceedings. 39th
ISSN
0738-100X
Print_ISBN
1-58113-461-4
Type
conf
DOI
10.1109/DAC.2002.1012721
Filename
1012721
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