Title :
Optimum use of DC side commutation in PWM inverters
Author :
Agelidis, Vassilios G. ; Ziogas, Phoivos D. ; Joos, Geza
Author_Institution :
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
Abstract :
Switching losses limit the inverter switching frequency and decrease the overall conversion efficiency. Minimizing switching losses can be effectively achieved by employing soft switching techniques. Specifically, zero voltage switching (ZVS) for a three-phase voltage source inverter (VSI) can be obtained by reducing the switch voltage to zero before main transistor turn-on (switch antiparallel diode conduction) and by keeping the switch voltage to zero during turn-off (purely capacitive snubber). A novel three-phase ZVS PWM VSI topology employing a simple DC bus active snubber subcircuit that provides soft switching commutations is proposed. The main advantage of the proposed inverter commutation scheme is that the DC bus snubber subcircuit is activated only when required, that is when dictated by the respective pulsewidth modulator. Detailed analysis and design procedures are provided and simulation and experimental results are presented to verify the principles of operation of the proposed power inverter scheme
Keywords :
commutation; invertors; losses; pulse width modulation; switching; DC bus active snubber subcircuit; DC side commutation; PWM inverters; capacitive snubber; soft switching techniques; switch antiparallel diode conduction; switching losses minimisation; three-phase voltage source inverter; transistor turn-on; zero voltage switching; Diodes; Pulse inverters; Pulse width modulation; Pulse width modulation inverters; Snubbers; Switches; Switching frequency; Switching loss; Topology; Zero voltage switching;
Conference_Titel :
Power Electronics Specialists Conference, 1991. PESC '91 Record., 22nd Annual IEEE
Conference_Location :
Cambridge, MA
Print_ISBN :
0-7803-0090-4
DOI :
10.1109/PESC.1991.162688