DocumentCode :
1852920
Title :
A high performance class-D amplifier with cascaded sigma-delta modulators
Author :
Trehan, Chintan ; Chao, Kwong S.
Author_Institution :
Dept. of Electr. & Comput. Eng., Texas Tech. Univ., Lubbock, TX, USA
Volume :
1
fYear :
2004
fDate :
25-28 July 2004
Abstract :
A topology for high performance of a class-D amplifier is proposed. The structural design consists of two sigma-delta modulator (SDM) stages in cascade with an intermediate decimation-filter between them. Noise and high tone introduced at the first stage are filtered out through the decimation-filter. The signal is converted to a 1-bit pulse duration modulation signal by the second stage SDM. The H-bridge is made part of the SDM loop, which not only enables the shaping of quantization noise but also stabilizes the output power switching stage.
Keywords :
FIR filters; circuit simulation; feedback amplifiers; network topology; pulse modulation; quantisation (signal); sigma-delta modulation; H-bridge; cascaded sigma-delta modulators; circuit simulation; circuit topology; feedback amplifiers; high performance class-D amplifier; intermediate decimation filter; power switching stabilization; pulse duration modulation; quantization noise; Delay; Delta-sigma modulation; Filters; Noise shaping; Power generation; Pulse amplifiers; Pulse width modulation; Signal resolution; Signal to noise ratio; Space vector pulse width modulation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2004. MWSCAS '04. The 2004 47th Midwest Symposium on
Print_ISBN :
0-7803-8346-X
Type :
conf
DOI :
10.1109/MWSCAS.2004.1353998
Filename :
1353998
Link To Document :
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