Increasing the on-die nodal observability and controllability use of advanced design for debug circuit features

Author

Chen, Yuan Chuan Steven ; Bockelman, Dan

Author_Institution

Intel Corp., Hillsboro, OR

fYear

2008

fDate

23-25 April 2008

Firstpage

13

Lastpage

16

Abstract

A post-silicon design validation methodology using on-die clock design for debug (DFD) circuits working together with advanced optical silicon probing techniques has been developed. Innovations are on increasing the nodal observability by using an infrared photon-emission (IREM) logic state image (LSI) technique and on increasing the nodal controllability by using a laser assisted device alternation (LADA) technique. This new approach provides a better solution for determining the root causes of marginal circuits associated with process variations or logic cones across multiple clock voltage, and/or temperature operation domains.

Keywords

clocks; integrated circuit design; logic design; advanced design; advanced optical silicon probing techniques; debug circuit features; infrared photon-emission; laser assisted device alternation technique; logic cones; logic state image technique; multiple clock voltage; on-die clock design for debug circuits; on-die nodal controllability; on-die nodal observability; post-silicon design validation methodology; process variations; temperature operation domains; Circuits; Clocks; Controllability; Design for disassembly; Design methodology; Logic devices; Observability; Optical design; Optical design techniques; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, Automation and Test, 2008. VLSI-DAT 2008. IEEE International Symposium on

Conference_Location

Hsinchu

Print_ISBN

978-1-4244-1616-5

Electronic_ISBN

978-1-4244-1617-2

Type

conf

DOI

10.1109/VDAT.2008.4542401

Filename

4542401