• DocumentCode
    1853191
  • Title

    On minimizing topography variation in multi-layer oxide CMP manufacturability

  • Author

    Shui, Chi Hui ; Chen, Hung Ming

  • Author_Institution
    Taiwan Semicond. Manuf. Co., Hsinchu
  • fYear
    2008
  • fDate
    23-25 April 2008
  • Firstpage
    39
  • Lastpage
    42
  • Abstract
    Due to advanced technology manufacturing variations, dummy metal insertion becomes the key process of VLSI fabrication in reducing wafer-topography variation in Al- based and Cu-based chemical mechanical polishing (CMP) processes. In this paper, we propose a faster and more effective approach to dealing with inter-layer dielectric (ILD) CMP issue, called Effective Model-based Dummy Insertion (EMDI). EMDI selects panels to insert dummy metal by effective CMP low pass filter model, and obtain feasible solutions with good quality based on minimized effective density. Compared with previous linear programming approach that costs 0(n3) (We have n * n panels in chip layout), EMDI is quite fast in O(nlogn) which is dominated by fast Fourier transformation. Multi-layer dummy metal insertion is considered in our framework as well. The experiments on a real design show that our approach has outperformed the previous approach, and is more efficient and effective in the smoothness of metal layers.
  • Keywords
    VLSI; chemical mechanical polishing; dielectric thin films; fast Fourier transforms; integrated circuit design; integrated circuit manufacture; low-pass filters; multilayers; surface topography; VLSI fabrication; chemical mechanical polishing processes; dummy metal insertion; fast Fourier transformation; inter-layer dielectric; low pass filter model; metal layer smoothness; multilayer oxide CMP manufacturability; wafer-topography variation; Chemical processes; Chemical technology; Dielectrics; Fabrication; Linear programming; Low pass filters; Manufacturing processes; Semiconductor device modeling; Surfaces; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, Automation and Test, 2008. VLSI-DAT 2008. IEEE International Symposium on
  • Conference_Location
    Hsinchu
  • Print_ISBN
    978-1-4244-1616-5
  • Electronic_ISBN
    978-1-4244-1617-2
  • Type

    conf

  • DOI
    10.1109/VDAT.2008.4542407
  • Filename
    4542407