DocumentCode :
1853361
Title :
DfT for full accessibility of multi-step analog to digital converters
Author :
Zjajo, Amir ; De Gyvez, Jose Pineda
Author_Institution :
NXP Semicond., Eindhoven
fYear :
2008
fDate :
23-25 April 2008
Firstpage :
73
Lastpage :
76
Abstract :
This paper reports a Design for Testability (DfT) technique, which provides necessary diagnostic capability for signature-based and functional testing of multi-step analog to digital converters. The proposed approach permits circuit re-configuration in such a way that all sub-blocks are tested for their full input range allowing full observability and controllability of the device under test. The proposed DfT can be used for engineering pre-characterization as well, and can easily be interfaced to standards like I2C and IEEE 1149.1 TAP controllers. Experimental evidence is provided on the 12 bit multi-step analog to digital converter fabricated in standard single poly, six metal 0.09-mum CMOS.
Keywords :
CMOS integrated circuits; analogue-digital conversion; design for testability; CMOS; IEEE 1149.1 TAP controllers; circuit reconfiguration; design for testability; multistep analog to digital converters; size 0.09 mum; Analog circuits; Analog-digital conversion; Automatic testing; Circuit testing; Controllability; Design for testability; Filters; Observability; Switches; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, Automation and Test, 2008. VLSI-DAT 2008. IEEE International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4244-1616-5
Electronic_ISBN :
978-1-4244-1617-2
Type :
conf
DOI :
10.1109/VDAT.2008.4542415
Filename :
4542415
Link To Document :
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