DocumentCode :
1853482
Title :
The Pivotal Role of Tera-scale Performance in Future Networks: Sequoia vs Multi-core Teraflop Chip
Author :
Amir, Samreen ; Asif, Muhammad ; Mustafa, Maria
Author_Institution :
Electron. Eng. Dept., Sir Syed Univ. of Eng. & Technol., Karachi, Pakistan
fYear :
2010
fDate :
22-24 Jan. 2010
Firstpage :
265
Lastpage :
268
Abstract :
With the increasing greed for the high data rates and maximum bandwidth utilization, the technology improvement and enhancement is been exponential in the current decade. Researchers hope that massive parallel processing (MPP) computing equipment will provide processing rates of 10 trillion or quadrillion floating-point operations per second. It would allow scientists to build models of phenomena that have never before been imitated. Many vendors are busy in the research and development of such speedy machines. This paper will provide a comparative analysis of the future high computing machines in terms of speed, size applications, architecture and affordability. A predictive conclusion regarding the dominance of one on the other will also be drawn on the basis of this comparison.
Keywords :
floating point arithmetic; microprocessor chips; multiprocessing systems; parallel processing; bandwidth utilization; floating-point operations per second; high computing machines; massive parallel processing computing equipment; multicore teraflop chip; research and development; sequoia; speedy machines; tera-scale performance; Bandwidth; Computer architecture; Costs; Engines; Moore´s Law; Multicore processing; Portable computers; Space technology; Supercomputers; Workstations; mesochronoas; multi-core; processing engine;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Future Networks, 2010. ICFN '10. Second International Conference on
Conference_Location :
Sanya, Hainan
Print_ISBN :
978-0-7695-3940-9
Electronic_ISBN :
978-1-4244-5667-3
Type :
conf
DOI :
10.1109/ICFN.2010.97
Filename :
5431841
Link To Document :
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