DocumentCode
1853561
Title
A central office combined ADSL-VDSL line driver solution in .35μm CMOS
Author
Piessens, Tim ; Steyaert, Michiel
Author_Institution
ESAT-MICAS, KU Leuven, Belgium
fYear
2002
fDate
2002
Firstpage
45
Lastpage
48
Abstract
A central office ADSL-VDSL line driver in a 0.35 μm 3.3 V CMOS technology is presented. The chip has a missing tone power ratio (MTPR) over 55 dB driving ADSL signals and can deliver VDSL downstream signals with a bandwidth of 8.6 MHz and an out-of-band PSD of -103 dBm/Hz. The power efficiency is 47% for 100 mW ADSL signals with a crest factor of >5.
Keywords
CMOS analogue integrated circuits; application specific integrated circuits; delta-sigma modulation; digital subscriber lines; driver circuits; power amplifiers; 0.35 micron; 100 mW; 3.3 V; 47 percent; 8.6 MHz; ASIC; CMOS technology; central office line driver; combined ADSL-VDSL line driver; delta sigma modulation; missing tone power ratio; third order self oscillating power amplifier; Bandwidth; CMOS technology; Central office; Chirp modulation; Driver circuits; Integrated circuit noise; Linearity; Modems; Power amplifiers; Switching frequency;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 2002. Proceedings of the IEEE 2002
Print_ISBN
0-7803-7250-6
Type
conf
DOI
10.1109/CICC.2002.1012763
Filename
1012763
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