DocumentCode
1853617
Title
An architecture for a programmable mixed-signal device
Author
Mar, Monte ; Sullam, Bert ; Blom, Eric
Author_Institution
Cypress MicroSystems, Inc., Bothell, WA, USA
fYear
2002
fDate
2002
Firstpage
55
Lastpage
58
Abstract
An architecture for one of the first mixed-signal field-programmable system-on-a-chip (FPSOC) is presented. The FPSOC integrates a 24-MHz 8-bit microcontroller, flash memory, SRAM, programmable analog and digital blocks, and on-chip clock generation. Programmable interconnect has been designed to allow analog and digital blocks to be combined to form a wide variety of functional modules.
Keywords
VLSI; microcontrollers; mixed analogue-digital integrated circuits; programmable circuits; 24 MHz; 8 bit; SRAM; SoC architecture; flash memory; microcontroller; mixed-signal field programmable SoC; on-chip clock generation; programmable analog blocks; programmable digital blocks; programmable interconnect; system-on-a-chip; Application specific integrated circuits; CMOS technology; Clocks; Design optimization; Embedded system; Field programmable gate arrays; Flash memory; Integrated circuit interconnections; Microcontrollers; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 2002. Proceedings of the IEEE 2002
Print_ISBN
0-7803-7250-6
Type
conf
DOI
10.1109/CICC.2002.1012765
Filename
1012765
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