Title :
An FPGA based move generator for the game of chess
Author :
Boulé, Marc ; Zilic, Zeljko
Author_Institution :
McGill Univ., Montreal, Que., Canada
Abstract :
This paper details the architecture of an FPGA chess-move generator. The design is based on Deep Blue´s move generator. The inherent differences between ASICs and FPGAs imply many design changes. We present improvements that exploit important FPGA features (lookup-table based logic, routing resources, distributed and block RAM)
Keywords :
computer games; field programmable gate arrays; games of skill; table lookup; Belle; Deep Blue; FPGA based move generator; block RAM; chess-move generator architecture; chessboard representation; distributed RAM; game of chess; lookup-table based logic; routing resources; Circuits; Clocks; Electronics packaging; Field programmable gate arrays; Hardware; Logic arrays; Microprocessors; Read-write memory; Routing; Transmitters;
Conference_Titel :
Custom Integrated Circuits Conference, 2002. Proceedings of the IEEE 2002
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-7250-6
DOI :
10.1109/CICC.2002.1012769
