• DocumentCode
    1854010
  • Title

    A fixed bits LDPC decoder

  • Author

    Xu, Fen ; Zhou, Liang ; Wen, Hong ; Huang, Chen ; Zhao, Qian

  • Author_Institution
    Nat. Key Lab. of, Univ. of Electron. Sci. & Technol. of China, Chengdu, China
  • Volume
    2
  • fYear
    2010
  • fDate
    1-3 Aug. 2010
  • Abstract
    With iterative decoding, most LDPC codes have a weakness known as error floor. In this work, we propose a fixed bits LDPC decoding scheme to improve the ability of LDPC transmission. The method is universal as it can be applied to any code/channel model/decoding algorithm and it improves performance greatly, without losing the code regularity, without changing the decoding algorithm. Simulation results show that the error floor performance also can be significantly improved with this decoding scheme.
  • Keywords
    channel coding; iterative decoding; parity check codes; channel model; fixed bit LDPC decoding scheme; iterative decoding algorithm; Decoding; Encoding; Floors; Iterative decoding; Matrix converters; Quantization; LDPC; error floor; fixed bits; min-sum decoding algorithm;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics and Information Engineering (ICEIE), 2010 International Conference On
  • Conference_Location
    Kyoto
  • Print_ISBN
    978-1-4244-7679-4
  • Electronic_ISBN
    978-1-4244-7681-7
  • Type

    conf

  • DOI
    10.1109/ICEIE.2010.5559810
  • Filename
    5559810