A high performance SoPC based digital receiver for monopulse tracking radar

In this paper, a system on programmable chip (SoPC) based implementation of digital receiver for monopulse tracking radar applications applying linear frequency modulation (LFM) signal is given. In order to meet the increased requirements of system miniaturization and low power consumption, the system function will be partitioned into several time-division stages with software or hardware implementation ways respectively, and an optimized processing structure in field programmable gate array (FPGA) is proposed to integrate all the processing procedure into single FPGA chip. In the verification part, the field experimental results indicate the validity of the system design and engineering applicability of the proposed structure.